Topology Selection for Medium-Voltage Three-Phase SiC Solid-State Transformer

The first stage in the structure of a three-phase solid state transformer (SST) is a medium voltage active rectifier. Due to its relatively high voltage operating conditions, this rectifier requires careful topology selection for empirical implementation. In this paper, different topologies of active rectifiers are studied as candidates for the first stage in SSTs. The selected topologies are narrowed down to three most suitable topologies. Three selected topologies are the current source buck rectifier, the diode-clamped rectifier, and the series active filter. For comparison purposes, loss analysis of these three rectifiers is carried out using simulations and experimental implementation. In this study, for the sake of practicality and simplicity, 10 kV Silicon Carbide (SiC) MOSFETs and diodes are utilized to reduce the number of components in the multilevel structure of the rectifiers. Other than loss analysis, a new technique for capacitor voltage regulation for the series active filter topology is also proposed and experimentally verified. Considering the loss data and other issues such as line current total harmonic distortion (THD), it is concluded that the series active filter topology is the most suitable one for this application.