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Study on the effect of wafer back grinding process on nanomechanical behavior of multilayered low-k stack

  • Vasarla Nagendra Sekhar
  • , Lu Shen
  • , Aditya Kumar
  • , Tai Chong Chai
  • , Xiaowu Zhang
  • , C. S. Premchandran
  • , Vaidyanathan Kripesh
  • , Seung Wook Yoon
  • , John H. Lau
  • Agency for Science, Technology and Research, Singapore
  • Global Foundries
  • STATS ChipPAC Ltd.
  • Industrial Technology Research Institute of Taiwan

Research output: Contribution to journalArticlepeer-review

Original languageEnglish
Article number6093739
Pages (from-to)3-12
Number of pages10
JournalIEEE Transactions on Components, Packaging and Manufacturing Technology
Volume2
Issue number1
DOIs
StatePublished - Jan 2012
Externally publishedYes

ASJC Scopus Subject Areas

  • Electronic, Optical and Magnetic Materials
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

Keywords

  • 3-D packaging
  • low-k stack
  • nanoindentation
  • nanoscratch
  • transmission electron microscopy analysis
  • wafer back grinding/wafer thinning

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