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Modeling Static Delay Variations in Push-Pull CMOS Digital Logic Circuits Due to Electrical Disturbances in the Power Supply

  • Xu Gao
  • , Chunchun Sui
  • , Sameer D. Hemmady
  • , Joey Rivera
  • , Susumujoe Yakura
  • , David Pommerenke
  • , Abhishek Patnaik
  • , Daryl G. Beetner
  • Missouri University of Science and Technology

Research output: Contribution to journalArticlepeer-review

Original languageEnglish
Article number7109138
Pages (from-to)1179-1187
Number of pages9
JournalIEEE Transactions on Electromagnetic Compatibility
Volume57
Issue number5
DOIs
StatePublished - Oct 1 2015

ASJC Scopus Subject Areas

  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Keywords

  • CMOS integrated circuits (ICs)
  • delay estimation
  • electromagnetic interference
  • electromagnetic transients
  • immunity
  • modeling

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