Modeling Multilayered PCB Power-Bus Designs using an MPIE Based Circuit Extraction Technique

Hao Shi; Jun Fan; James L. Drewniak; Todd H. Hubing; Thomas Van Doren

doi:10.1109/ISEMC.1998.750273

Modeling Multilayered PCB Power-Bus Designs using an MPIE Based Circuit Extraction Technique

Hao Shi
, Jun Fan
, James L. Drewniak
, Todd H. Hubing
, Thomas Van Doren

Electrical and Computer Engineering

Missouri University of Science and Technology

Research output: Contribution to journal › Article › peer-review

Abstract

A circuit extraction tool (CEMPIE) has been developed based on the mixed-potential integral equation (MPIE) using a quasi-static approximation. A power-bus in a multi-layered PCB consisting of a pair of dedicated ground and power planes is studied using this tool. The distributed behavior of a power-bus is represented by a collection of passive circuit elements, which is valid up to several gigahertz. The decoupling performance of a power-bus due to its layer spacing and the dielectric constant is evaluated for simple test geometries. The impact of the relative distance between the noise source and the potential receiver is also studied. Novel structures such as a power island were studied in both thin and thick boards, and the decoupling performance due to the locations and values of the decoupling capacitors were also investigated.

Original language	American English
Pages (from-to)	647-651
Number of pages	5
Journal	Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (1998, Denver, CO)
Volume	2
DOIs	https://doi.org/10.1109/ISEMC.1998.750273
State	Published - Aug 1 1998
Event	Proceedings of the 1998 IEEE International Symposium on Electromagnetic Compatibility. Part 1 (of 2) - Denver, CO, USA Duration: Aug 24 1998 → Aug 28 1998

ASJC Scopus Subject Areas

Condensed Matter Physics
Electrical and Electronic Engineering

Keywords

MPIE Based Circuit Extraction Technique
Circuit Analysis Computing
Circuit Extraction Tool
Decoupling Capacitors
Decoupling Performance
Dedicated Ground Planes
Dedicated Power Planes
Dielectric Constant
Equivalent Circuits
Integral Equations
Layer Spacing
Mixed-Potential Integral Equation
Multilayered PCB Power-Bus Designs
Noise Source
Passive Circuit Elements
Permittivity
Potential Receiver
Power Island
Power-Bus
Printed Circuit Design
Quasi-Static Approximation
Test Geometries

Disciplines

Electrical and Computer Engineering

Access to Document

10.1109/ISEMC.1998.750273License: CC BY

Modeling Multilayered PCB Power-Bus Designs using an MPIE Based CFinal published version, 501 KBLicense: CC BY

Cite this

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title = "Modeling Multilayered PCB Power-Bus Designs using an MPIE Based Circuit Extraction Technique",

abstract = " A circuit extraction tool (CEMPIE) has been developed based on the mixed-potential integral equation (MPIE) using a quasi-static approximation. A power-bus in a multi-layered PCB consisting of a pair of dedicated ground and power planes is studied using this tool. The distributed behavior of a power-bus is represented by a collection of passive circuit elements, which is valid up to several gigahertz. The decoupling performance of a power-bus due to its layer spacing and the dielectric constant is evaluated for simple test geometries. The impact of the relative distance between the noise source and the potential receiver is also studied. Novel structures such as a power island were studied in both thin and thick boards, and the decoupling performance due to the locations and values of the decoupling capacitors were also investigated.",

keywords = "MPIE Based Circuit Extraction Technique, Circuit Analysis Computing, Circuit Extraction Tool, Decoupling Capacitors, Decoupling Performance, Dedicated Ground Planes, Dedicated Power Planes, Dielectric Constant, Equivalent Circuits, Integral Equations, Layer Spacing, Mixed-Potential Integral Equation, Multilayered PCB Power-Bus Designs, Noise Source, Passive Circuit Elements, Permittivity, Potential Receiver, Power Island, Power-Bus, Printed Circuit Design, Quasi-Static Approximation, Test Geometries",

author = "Hao Shi and Jun Fan and Drewniak, \{James L.\} and Hubing, \{Todd H.\} and \{Van Doren\}, Thomas",

year = "1998",

month = aug,

day = "1",

doi = "10.1109/ISEMC.1998.750273",

language = "American English",

volume = "2",

pages = "647--651",

journal = "Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (1998, Denver, CO)",

note = "Proceedings of the 1998 IEEE International Symposium on Electromagnetic Compatibility. Part 1 (of 2) ; Conference date: 24-08-1998 Through 28-08-1998",

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T1 - Modeling Multilayered PCB Power-Bus Designs using an MPIE Based Circuit Extraction Technique

AU - Shi, Hao

AU - Fan, Jun

AU - Drewniak, James L.

AU - Hubing, Todd H.

AU - Van Doren, Thomas

PY - 1998/8/1

Y1 - 1998/8/1

N2 - A circuit extraction tool (CEMPIE) has been developed based on the mixed-potential integral equation (MPIE) using a quasi-static approximation. A power-bus in a multi-layered PCB consisting of a pair of dedicated ground and power planes is studied using this tool. The distributed behavior of a power-bus is represented by a collection of passive circuit elements, which is valid up to several gigahertz. The decoupling performance of a power-bus due to its layer spacing and the dielectric constant is evaluated for simple test geometries. The impact of the relative distance between the noise source and the potential receiver is also studied. Novel structures such as a power island were studied in both thin and thick boards, and the decoupling performance due to the locations and values of the decoupling capacitors were also investigated.

AB - A circuit extraction tool (CEMPIE) has been developed based on the mixed-potential integral equation (MPIE) using a quasi-static approximation. A power-bus in a multi-layered PCB consisting of a pair of dedicated ground and power planes is studied using this tool. The distributed behavior of a power-bus is represented by a collection of passive circuit elements, which is valid up to several gigahertz. The decoupling performance of a power-bus due to its layer spacing and the dielectric constant is evaluated for simple test geometries. The impact of the relative distance between the noise source and the potential receiver is also studied. Novel structures such as a power island were studied in both thin and thick boards, and the decoupling performance due to the locations and values of the decoupling capacitors were also investigated.

KW - MPIE Based Circuit Extraction Technique

KW - Circuit Analysis Computing

KW - Circuit Extraction Tool

KW - Decoupling Capacitors

KW - Decoupling Performance

KW - Dedicated Ground Planes

KW - Dedicated Power Planes

KW - Dielectric Constant

KW - Equivalent Circuits

KW - Integral Equations

KW - Layer Spacing

KW - Mixed-Potential Integral Equation

KW - Multilayered PCB Power-Bus Designs

KW - Noise Source

KW - Passive Circuit Elements

KW - Permittivity

KW - Potential Receiver

KW - Power Island

KW - Power-Bus

KW - Printed Circuit Design

KW - Quasi-Static Approximation

KW - Test Geometries

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DO - 10.1109/ISEMC.1998.750273

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SP - 647

EP - 651

JO - Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (1998, Denver, CO)

JF - Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (1998, Denver, CO)

T2 - Proceedings of the 1998 IEEE International Symposium on Electromagnetic Compatibility. Part 1 (of 2)

Y2 - 24 August 1998 through 28 August 1998

ER -

Modeling Multilayered PCB Power-Bus Designs using an MPIE Based Circuit Extraction Technique

Abstract

ASJC Scopus Subject Areas

Keywords

Disciplines

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