Abstract
Advances in field reconfigurable technology have made possible the design and implementation of highly flexible parallel multi-processor-memory systems; system reliability is often an important measure of these systems because a degradation of an individual module can unacceptably impair the reliable operation of these systems. System reliability is mainly determined by the hardware (HW) configurations (requested by the software, SW) and the process of field reconfiguration/repair (by utilizing unused processors and memory modules as spares). This is referred to as HW/SW Co-reliability. System configurations are categorized in terms of parallel processor size and processor/memory intensity as affecting the HW/SW Co-reliability. Their characteristics are discussed. A model for HW/SW Co-reliability based on a combinatorial analysis for field reconfigurable multiprocessor-memory systems is then proposed and further validated by extensive parametric simulations, thus allowing the design and implementation of highly reliable field-reconfigurable multiprocessor-memory systems.
| Original language | American English |
|---|---|
| Journal | Proceedings of the International Parallel and Distributed Processing Symposium (2002, Ft. Lauderdale, FL) |
| DOIs | |
| State | Published - Apr 1 2002 |
Keywords
- Analytical Models
- Computer Science
- Degradation
- Distributed Processing
- Electric Variables Measurement
- Fault Detection
- Field Reconfiguration
- HW/SW Co-Reliability
- Hardware
- Modular Redundancy
- Multi-Processor-Memory System
- Multiprocessing Systems
- Redundancy
- Reliability
Disciplines
- Electrical and Computer Engineering
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