Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach

Prashanthi Metku; Minsu Choi; Kyung Ki Kim; Yong Bin Kim

doi:10.1109/ISOCC50952.2020.9332941

Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach

Prashanthi Metku
, Minsu Choi
, Kyung Ki Kim
, Yong Bin Kim

Electrical and Computer Engineering

Missouri University of Science and Technology
Daegu University
Northeastern University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	Proceedings - International SoC Design Conference, ISOCC 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	282-283
Number of pages	2
ISBN (Electronic)	9781728183312
DOIs	https://doi.org/10.1109/ISOCC50952.2020.9332941
State	Published - Oct 21 2020
Event	17th International System-on-Chip Design Conference, ISOCC 2020 - Yeosu, Korea, Republic of Duration: Oct 21 2020 → Oct 24 2020

Publication series

Name	Proceedings - International SoC Design Conference, ISOCC 2020

Conference

Conference	17th International System-on-Chip Design Conference, ISOCC 2020
Country/Territory	Korea, Republic of
City	Yeosu
Period	10/21/20 → 10/24/20

ASJC Scopus Subject Areas

Energy Engineering and Power Technology
Electrical and Electronic Engineering
Instrumentation
Artificial Intelligence
Hardware and Architecture

Keywords

cadence
CMOS
gate diffusion input
Multi-Threshold NULL convention logic

Access to Document

10.1109/ISOCC50952.2020.9332941

Cite this

Metku, P., Choi, M., Kim, K. K., & Kim, Y. B. (2020). Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach. In Proceedings - International SoC Design Conference, ISOCC 2020 (pp. 282-283). Article 9332941 (Proceedings - International SoC Design Conference, ISOCC 2020). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC50952.2020.9332941

Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach. / Metku, Prashanthi; Choi, Minsu; Kim, Kyung Ki et al.
Proceedings - International SoC Design Conference, ISOCC 2020. Institute of Electrical and Electronics Engineers Inc., 2020. p. 282-283 9332941 (Proceedings - International SoC Design Conference, ISOCC 2020).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Metku, P, Choi, M, Kim, KK & Kim, YB 2020, Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach. in Proceedings - International SoC Design Conference, ISOCC 2020., 9332941, Proceedings - International SoC Design Conference, ISOCC 2020, Institute of Electrical and Electronics Engineers Inc., pp. 282-283, 17th International System-on-Chip Design Conference, ISOCC 2020, Yeosu, Korea, Republic of, 10/21/20. https://doi.org/10.1109/ISOCC50952.2020.9332941

@inproceedings{9ce300cb08244aa59979642d2b5d0904,

title = "Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach",

keywords = "cadence, CMOS, gate diffusion input, Multi-Threshold NULL convention logic",

author = "Prashanthi Metku and Minsu Choi and Kim, \{Kyung Ki\} and Kim, \{Yong Bin\}",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 17th International System-on-Chip Design Conference, ISOCC 2020 ; Conference date: 21-10-2020 Through 24-10-2020",

year = "2020",

month = oct,

day = "21",

doi = "10.1109/ISOCC50952.2020.9332941",

language = "English",

series = "Proceedings - International SoC Design Conference, ISOCC 2020",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "282--283",

booktitle = "Proceedings - International SoC Design Conference, ISOCC 2020",

}

TY - GEN

T1 - Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach

AU - Metku, Prashanthi

AU - Choi, Minsu

AU - Kim, Kyung Ki

AU - Kim, Yong Bin

PY - 2020/10/21

Y1 - 2020/10/21

KW - cadence

KW - CMOS

KW - gate diffusion input

KW - Multi-Threshold NULL convention logic

UR - https://www.scopus.com/pages/publications/85100798450

UR - https://www.scopus.com/pages/publications/85100798450#tab=citedBy

U2 - 10.1109/ISOCC50952.2020.9332941

DO - 10.1109/ISOCC50952.2020.9332941

M3 - Conference contribution

AN - SCOPUS:85100798450

T3 - Proceedings - International SoC Design Conference, ISOCC 2020

SP - 282

EP - 283

BT - Proceedings - International SoC Design Conference, ISOCC 2020

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 17th International System-on-Chip Design Conference, ISOCC 2020

Y2 - 21 October 2020 through 24 October 2020

ER -

Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach

Publication series

Conference

ASJC Scopus Subject Areas

Keywords

Access to Document

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