Effect of high temperature storage on the stress and reliability of 3D stacked chip

Tengfei Jiang; Chenglin Wu; Peng Su; Pierre Chia; Li Li; Ho Young Son; Min Suk Suh; Nam Seog Kim; Jay Im; Rui Huang; Paul S. Ho

doi:10.1109/ECTC.2014.6897430

Effect of high temperature storage on the stress and reliability of 3D stacked chip

Tengfei Jiang
, Chenglin Wu
, Peng Su
, Pierre Chia
, Li Li
, Ho Young Son
, Min Suk Suh
, Nam Seog Kim
, Jay Im
, Rui Huang
, Paul S. Ho

University of Texas at Austin
Cisco Systems
SK Corporation

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	Proceedings - Electronic Components and Technology Conference
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1122-1127
Number of pages	6
ISBN (Electronic)	9781479924073
DOIs	https://doi.org/10.1109/ECTC.2014.6897430
State	Published - Sep 11 2014
Externally published	Yes
Event	64th Electronic Components and Technology Conference, ECTC 2014 - Orlando, United States Duration: May 27 2014 → May 30 2014

Publication series

Name	Proceedings - Electronic Components and Technology Conference
ISSN (Print)	0569-5503

Conference

Conference	64th Electronic Components and Technology Conference, ECTC 2014
Country/Territory	United States
City	Orlando
Period	5/27/14 → 5/30/14

ASJC Scopus Subject Areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/ECTC.2014.6897430

Cite this

Jiang, T., Wu, C., Su, P., Chia, P., Li, L., Son, H. Y., Suh, M. S., Kim, N. S., Im, J., Huang, R., & Ho, P. S. (2014). Effect of high temperature storage on the stress and reliability of 3D stacked chip. In Proceedings - Electronic Components and Technology Conference (pp. 1122-1127). Article 6897430 (Proceedings - Electronic Components and Technology Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECTC.2014.6897430

Effect of high temperature storage on the stress and reliability of 3D stacked chip. / Jiang, Tengfei; Wu, Chenglin; Su, Peng et al.
Proceedings - Electronic Components and Technology Conference. Institute of Electrical and Electronics Engineers Inc., 2014. p. 1122-1127 6897430 (Proceedings - Electronic Components and Technology Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Jiang, T, Wu, C, Su, P, Chia, P, Li, L, Son, HY, Suh, MS, Kim, NS, Im, J, Huang, R & Ho, PS 2014, Effect of high temperature storage on the stress and reliability of 3D stacked chip. in Proceedings - Electronic Components and Technology Conference., 6897430, Proceedings - Electronic Components and Technology Conference, Institute of Electrical and Electronics Engineers Inc., pp. 1122-1127, 64th Electronic Components and Technology Conference, ECTC 2014, Orlando, United States, 5/27/14. https://doi.org/10.1109/ECTC.2014.6897430

Jiang T, Wu C, Su P, Chia P, Li L, Son HY et al. Effect of high temperature storage on the stress and reliability of 3D stacked chip. In Proceedings - Electronic Components and Technology Conference. Institute of Electrical and Electronics Engineers Inc. 2014. p. 1122-1127. 6897430. (Proceedings - Electronic Components and Technology Conference). doi: 10.1109/ECTC.2014.6897430

@inproceedings{9cd62625f32d478eb73fa1526d684227,

title = "Effect of high temperature storage on the stress and reliability of 3D stacked chip",

author = "Tengfei Jiang and Chenglin Wu and Peng Su and Pierre Chia and Li Li and Son, \{Ho Young\} and Suh, \{Min Suk\} and Kim, \{Nam Seog\} and Jay Im and Rui Huang and Ho, \{Paul S.\}",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 64th Electronic Components and Technology Conference, ECTC 2014 ; Conference date: 27-05-2014 Through 30-05-2014",

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AU - Jiang, Tengfei

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AU - Chia, Pierre

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AU - Son, Ho Young

AU - Suh, Min Suk

AU - Kim, Nam Seog

AU - Im, Jay

AU - Huang, Rui

AU - Ho, Paul S.

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BT - Proceedings - Electronic Components and Technology Conference

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ER -

Effect of high temperature storage on the stress and reliability of 3D stacked chip

Publication series

Conference

ASJC Scopus Subject Areas

Access to Document

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Cite this