Abstract
In this work, a novel design and optimization method for programmable gate macro blocks (PGMB) in the newly proposed Asynchronous Nanowire Reconfigurable Crossbar Architecture (ANRCA) is presented. ANRCA is based on a self-timed logic referred to as the Null Convention Logic (NCL). Since there is no global clocking and clock distribution network, all failure modes related to timing will be either eliminated or relaxed. The proposed architecture is anticipated to have higher manufacturability and robustness that are critical factors in nanoscale systems due to nondeterministic nature of nanoassembly. In order to facilitate efficient programming and flexible reconfiguration, a new hierarchical reconfigurable architecture for ANRCA is also proposed. Various configurable logic block structures have been considered and also their programming and reconfiguration issues are discussed.
| Original language | American English |
|---|---|
| Journal | Proceedings of the IEEE 55th International Midwest Symposium on Circuits and Systems (2012, Boise, ID) |
| DOIs | |
| State | Published - Aug 1 2012 |
Keywords
- Asynchronous Computing
- Clock Distribution Networks
- Clocks
- Configurable Logic Blocks
- Critical Factors
- Crossbar Architecture
- Differentiating Circuits
- Flexible Reconfiguration
- Macro Block
- Manufacturability
- Nano-Assemblies
- Nano-Scale System
- Nanowire Crossbar
- Nanowires
- Novel Design
- Null Convention Logic (NCL)
- Optimization
- Programmable Gate
- Proposed Architectures
- Reconfigurable Architectures
- Reconfigurable Logic
- Self-Timed
Disciplines
- Electrical and Computer Engineering
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