An EMI Estimation for Shielding Edge Treaments on a Printed Circuit Board

Siqi Bai; Qian Liu; Kartheek Nalla; Jing Li; James L. Drewniak; Samuel R. Connor; Michael A. Cracraft; Bruce Archambeault

doi:10.1109/ISEMC.2016.7571722

An EMI Estimation for Shielding Edge Treaments on a Printed Circuit Board

Siqi Bai
, Qian Liu
, Kartheek Nalla
, Jing Li
, James L. Drewniak
, Samuel R. Connor
, Michael A. Cracraft
, Bruce Archambeault

Research output: Contribution to journal › Article › peer-review

Abstract

Various PCB edge treatments including via stitching and edge plating connecting ground planes can be employed to suppress the EMI from multilayer printed circuit boards. The shielding performance of these edge treatments is studied in this work. Design curves and an empirical equation are given based on parametric study to summarize the variation of the total radiated power (TRP) as a function of slot length (spacing between vias) and number of openings. Comparisons between measurements and simulation suitably agree within engineering accuracy.

Original language	American English
Journal	Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2016, Ottawa, Canada)
DOIs	https://doi.org/10.1109/ISEMC.2016.7571722
State	Published - Jul 1 2016

Keywords

Electromagnetic Compatibility
Electromagnetic Shielding
Reconfigurable Hardware
Shielding
Empirical Equations
Multilayer Printed Circuit Board
Parametric Study
Shielding Effectiveness
Shielding Performance
Total Radiated Power
Printed Circuit Boards
Apertures
Edge Platting
EMI
TRP

Disciplines

Electrical and Computer Engineering

Access to Document

10.1109/ISEMC.2016.7571722License: CC BY

https://doi.org/10.1109/ISEMC.2016.7571722

Cite this

@article{18d512a1007e41fca440c69a3e1b80fa,

title = "An EMI Estimation for Shielding Edge Treaments on a Printed Circuit Board",

abstract = " Various PCB edge treatments including via stitching and edge plating connecting ground planes can be employed to suppress the EMI from multilayer printed circuit boards. The shielding performance of these edge treatments is studied in this work. Design curves and an empirical equation are given based on parametric study to summarize the variation of the total radiated power (TRP) as a function of slot length (spacing between vias) and number of openings. Comparisons between measurements and simulation suitably agree within engineering accuracy.",

keywords = "Electromagnetic Compatibility, Electromagnetic Shielding, Reconfigurable Hardware, Shielding, Empirical Equations, Multilayer Printed Circuit Board, Parametric Study, Shielding Effectiveness, Shielding Performance, Total Radiated Power, Printed Circuit Boards, Apertures, Edge Platting, EMI, TRP",

author = "Siqi Bai and Qian Liu and Kartheek Nalla and Jing Li and Drewniak, \{James L.\} and Connor, \{Samuel R.\} and Cracraft, \{Michael A.\} and Bruce Archambeault",

year = "2016",

month = jul,

day = "1",

doi = "10.1109/ISEMC.2016.7571722",

language = "American English",

journal = "Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2016, Ottawa, Canada)",

}

TY - JOUR

T1 - An EMI Estimation for Shielding Edge Treaments on a Printed Circuit Board

AU - Bai, Siqi

AU - Liu, Qian

AU - Nalla, Kartheek

AU - Li, Jing

AU - Drewniak, James L.

AU - Connor, Samuel R.

AU - Cracraft, Michael A.

AU - Archambeault, Bruce

PY - 2016/7/1

Y1 - 2016/7/1

N2 - Various PCB edge treatments including via stitching and edge plating connecting ground planes can be employed to suppress the EMI from multilayer printed circuit boards. The shielding performance of these edge treatments is studied in this work. Design curves and an empirical equation are given based on parametric study to summarize the variation of the total radiated power (TRP) as a function of slot length (spacing between vias) and number of openings. Comparisons between measurements and simulation suitably agree within engineering accuracy.

AB - Various PCB edge treatments including via stitching and edge plating connecting ground planes can be employed to suppress the EMI from multilayer printed circuit boards. The shielding performance of these edge treatments is studied in this work. Design curves and an empirical equation are given based on parametric study to summarize the variation of the total radiated power (TRP) as a function of slot length (spacing between vias) and number of openings. Comparisons between measurements and simulation suitably agree within engineering accuracy.

KW - Electromagnetic Compatibility

KW - Electromagnetic Shielding

KW - Reconfigurable Hardware

KW - Shielding

KW - Empirical Equations

KW - Multilayer Printed Circuit Board

KW - Parametric Study

KW - Shielding Effectiveness

KW - Shielding Performance

KW - Total Radiated Power

KW - Printed Circuit Boards

KW - Apertures

KW - Edge Platting

KW - EMI

KW - TRP

UR - https://scholarsmine.mst.edu/ele_comeng_facwork/2119

UR - https://doi.org/10.1109/ISEMC.2016.7571722

U2 - 10.1109/ISEMC.2016.7571722

DO - 10.1109/ISEMC.2016.7571722

M3 - Article

JO - Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2016, Ottawa, Canada)

JF - Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2016, Ottawa, Canada)

ER -

An EMI Estimation for Shielding Edge Treaments on a Printed Circuit Board

Abstract

Keywords

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