A Decision Tree Approach for Subcircuit Extraction Problem

Nian Zhang; Donald C. Wunsch

A Decision Tree Approach for Subcircuit Extraction Problem

Nian Zhang
, Donald C. Wunsch

Research output: Contribution to journal › Article › peer-review

Abstract

The layout versus schematic (LVS) analysis is an essential part of topology design verification, and subcircuit extraction is one of the operations in the LVS testing. We provided an efficient decision tree approach to the subcircuit extraction problem based on the solution to the graph isomorphism problem. We construct the decision tree for the pattern circuit and the main circuit. And then we perform a classification process. To evaluate its performance, we compare it with the neural networks based heuristic dynamic programming algorithm (SubHDP) which is by far one of the fastest algorithms for subcircuit extraction problem.

Original language	American English
Journal	Intelligent Engineering Systems Through Artificial Neural Networks
State	Published - Jan 1 2003

Keywords

Adaptive Critic Designs
Decision Tree
Layout Versus Schematic (LVS)
Neural Networks
VLSI Layout Verification

Disciplines

Electrical and Computer Engineering

Access to Document

http://catalog.asme.org/books/PrintBook/Intelligent_Engineerig.cfm

Cite this

@article{cfdff19ee57c41828c9743509019b5d4,

title = "A Decision Tree Approach for Subcircuit Extraction Problem",

abstract = " The layout versus schematic (LVS) analysis is an essential part of topology design verification, and subcircuit extraction is one of the operations in the LVS testing. We provided an efficient decision tree approach to the subcircuit extraction problem based on the solution to the graph isomorphism problem. We construct the decision tree for the pattern circuit and the main circuit. And then we perform a classification process. To evaluate its performance, we compare it with the neural networks based heuristic dynamic programming algorithm (SubHDP) which is by far one of the fastest algorithms for subcircuit extraction problem.",

keywords = "Adaptive Critic Designs, Decision Tree, Layout Versus Schematic (LVS), Neural Networks, VLSI Layout Verification",

author = "Nian Zhang and Wunsch, \{Donald C.\}",

year = "2003",

month = jan,

day = "1",

language = "American English",

journal = "Intelligent Engineering Systems Through Artificial Neural Networks",

}

TY - JOUR

T1 - A Decision Tree Approach for Subcircuit Extraction Problem

AU - Zhang, Nian

AU - Wunsch, Donald C.

PY - 2003/1/1

Y1 - 2003/1/1

N2 - The layout versus schematic (LVS) analysis is an essential part of topology design verification, and subcircuit extraction is one of the operations in the LVS testing. We provided an efficient decision tree approach to the subcircuit extraction problem based on the solution to the graph isomorphism problem. We construct the decision tree for the pattern circuit and the main circuit. And then we perform a classification process. To evaluate its performance, we compare it with the neural networks based heuristic dynamic programming algorithm (SubHDP) which is by far one of the fastest algorithms for subcircuit extraction problem.

AB - The layout versus schematic (LVS) analysis is an essential part of topology design verification, and subcircuit extraction is one of the operations in the LVS testing. We provided an efficient decision tree approach to the subcircuit extraction problem based on the solution to the graph isomorphism problem. We construct the decision tree for the pattern circuit and the main circuit. And then we perform a classification process. To evaluate its performance, we compare it with the neural networks based heuristic dynamic programming algorithm (SubHDP) which is by far one of the fastest algorithms for subcircuit extraction problem.

KW - Adaptive Critic Designs

KW - Decision Tree

KW - Layout Versus Schematic (LVS)

KW - Neural Networks

KW - VLSI Layout Verification

UR - https://scholarsmine.mst.edu/ele_comeng_facwork/447

UR - http://catalog.asme.org/books/PrintBook/Intelligent_Engineerig.cfm

M3 - Article

JO - Intelligent Engineering Systems Through Artificial Neural Networks

JF - Intelligent Engineering Systems Through Artificial Neural Networks

ER -

A Decision Tree Approach for Subcircuit Extraction Problem

Abstract

Keywords

Disciplines

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